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High performance computing
| titolo | High performance computing |
| sottotitolo | Parallel Processing Model and Architectures |
| Autore | Marco Vanneschi |
| Editore | Pisa University Press |
| Formato |
Ebook Pdf |
| protezione |
Social DRM
Informazioni sulla protezioneX |
| Pubblicazione | 2014 |
| ISBN | 9788867414567 |
Abstract
This book studies parallel processing methodologies and parallel architectures for High Performance Computing (HPC) according
Disponibile anche nel formato
This book studies parallel processing methodologies and parallel architectures for High Performance Computing (HPC) according to a structured and integrated approach. All issues in parallel programming and parallel architecture are dealt with in terms of structural models, static and dynamic support to computation and programming models, performance evaluation, capability for building complex and heterogeneous applications and/or enabling platforms. Models and methodologies precede the description of technologies and products (multi-/many-core technology, high-performance networks and interconnect technologies, parallel programming tools). Through this approach the reader will be able to understand and to critically analyze existing/future products and/or to properly adapt/combine them, and to conceive new solutions.
The book is organized into three Parts:
Parallel Processing Models and Methodology: structured parallel computations, interprocess communication, cost models, stream-parallel paradigms, data-parallel paradigms, computation graph structuring and optimization;
Single Instruction Stream Architectures: parallel systems at the firmware level, parallelism in cache memory hierarchies, Instruction Level Parallelism CPUs, Multithreading, SIMD and SIMT/GPU parallelism;
Multiple Instruction Stream Architectures: MIMD parallel architectures, Chip Multiprocessors, memory organization and process mapping, interconnection networks, processor synchronization, memory ordering, cache coherence, cost models, communication run-time support, shared memory vs message passing support, distributed architectures and interconnect technologies.
For reader’s convenience and for the sake of completeness, an ample Appendix in structured computer architecture is included, which renders the book self-contained.
The book can be used by researchers, Computer Science and Engineering professionals and designers working in the field of parallel processing models, parallel programming and HPC application developments, parallel architectures and run-time supports. The book material can be exploited for one or more courses in Master Degree, or PhD, programs of Computer Science and Engineering curricula.The book contains a large number of examples, exercises and small project proposals.
The book is organized into three Parts:
Parallel Processing Models and Methodology: structured parallel computations, interprocess communication, cost models, stream-parallel paradigms, data-parallel paradigms, computation graph structuring and optimization;
Single Instruction Stream Architectures: parallel systems at the firmware level, parallelism in cache memory hierarchies, Instruction Level Parallelism CPUs, Multithreading, SIMD and SIMT/GPU parallelism;
Multiple Instruction Stream Architectures: MIMD parallel architectures, Chip Multiprocessors, memory organization and process mapping, interconnection networks, processor synchronization, memory ordering, cache coherence, cost models, communication run-time support, shared memory vs message passing support, distributed architectures and interconnect technologies.
For reader’s convenience and for the sake of completeness, an ample Appendix in structured computer architecture is included, which renders the book self-contained.
The book can be used by researchers, Computer Science and Engineering professionals and designers working in the field of parallel processing models, parallel programming and HPC application developments, parallel architectures and run-time supports. The book material can be exploited for one or more courses in Master Degree, or PhD, programs of Computer Science and Engineering curricula.The book contains a large number of examples, exercises and small project proposals.
Biografia dell'autore
Marco Vanneschi
Marco Vanneschi è professore ordinario presso il Dipartimento di Informatica dell’Università di Pisa. La sua attività scientifica e didattica riguarda l’area dell’Architettura dei Sistemi di Elaborazione studiati a tutti i vari livelli di astrazione, con particolare riguardo alla ricerca su modelli e linguaggi per elaborazione in parallelo, architetture multiprocessore sistemi distribuiti. In queste aree ha coordinato diversi progetti nazionali e internazionali, e numerose collaborazioni con industrie ed enti. È stato proponente, ed è Presidente, del Corso di Laurea Magistrale in Informatica e Networking in collaborazione con la Scuola Superiore Sant’Anna. É autore di più di 150 articoli scientifici pubblicati su riviste internazionali e su atti di conferenze internazionali, e di vari libri didattici e di ricerca.
È stato insignito dell’Onorificenza del Cherubino da parte dell’Università di Pisa.
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